PH18 — Tower’s 200mm silicon-photonics process

Updated: 2026-04-29 Status: ✓ Verified via Tower technology pages, Tower investor-relations releases, semiconductor-today reporting, the Coherent / Tower OFC 2026 joint release, and the Lightwave Logic March 11, 2026 development-agreement press release. Items flagged ⚠ where primary-source disclosure is gated to PDK NDA. Cross-references: Technology overview · Tower-ST Agrate 300mm · Patents overview · overview

Executive summary

PH18 is Tower Semiconductor’s productized, open-foundry silicon-photonics process. The “PH” prefix denotes photonics; the “18” is the 180 nm process node (semiconductor-today on Alpine PH18 400G PAM4 build, 2020) ✓. The platform is hosted on Tower’s 200mm Fab 3 in Newport Beach, California — the legacy Jazz Semiconductor 8-inch SiGe BiCMOS line that became Tower property in the May 2008 Tower-Jazz stock-for-stock merger (Tower history page) ✓.

PH18 is positioned by Tower as a high-volume open-foundry SiPh platform for O-band and C-band data-center interconnect, with a productized device library spanning silicon and silicon-nitride waveguides, germanium PIN photodiodes and avalanche photodetectors, PIN-junction phase shifters, Mach-Zehnder modulators, on-chip heater elements, and fiber alignment / facet-coupling structures (Tower SiPh technology page) ✓. The process is paired with Tower’s adjacent SiGe BiCMOS nodes (TS18SL, SBC18S5) — also 180 nm-class on the same Newport Beach line — which carry the high-frequency drivers and TIAs needed to operate the photonic die at modern transceiver speeds (Tower technology overview).

Two recent disclosures dominate the 2026 PH18 narrative:

Coherent + Tower OFC 2026 demonstration (announced 2026-03-23) — a silicon Mach-Zehnder modulator built in Tower’s “production-ready SiPho process” hit a clear open eye at 420 Gb/s PAM4 when paired with a Coherent indium-phosphide CW high-power laser, targeting 3.2T transceivers and CPO (Tower / Coherent joint release on GlobeNewswire, 2026-03-23) ✓. Note: the Tower / Coherent press release names the platform “production-ready SiPho process” without spelling “PH18” explicitly; ◐ PH18 is the only Tower platform in HVM at the time of the OFC 2026 disclosure, so the modulator is mapped to PH18 by elimination.
Lightwave Logic + Tower development agreement (signed 2026-03-11) — Tower will integrate LWLG’s Perkinamine electro-optic polymer modulator reference designs into the PH18 PDK, with multiple engineering tape-outs in 2026 targeting 200 G and 400 G per lane and first sampling to customers by end-2026, volume in 2027 (Lightwave Logic / Tower development-agreement release on Stocktitan, 2026-03-11) ✓.

PH18 sits opposite GlobalFoundries Fotonix (45SPCLO + 9WG) in the AI-photonics foundry-tier landscape. Tower’s 200mm asset has lower wafer-cost overhead but lower transistor-density and lower RF-CMOS performance than Fotonix’s 300mm monolithic CMOS+photonics. The structural read is that the two foundries are complementary rather than directly substitutable for the major modulator-IP partners (LWLG, NLM Photonics) — see §6.

1. Node specifications

Parameter	Value	Source
Wafer size	200 mm (8-inch)	Tower SiPh technology page ✓
Process node	180 nm-class	semiconductor-today on Alpine PH18, 2020 ✓
Fab location	Newport Beach, California (Fab 3)	Tower fab footprint, 20-F 2025 ✓
Heritage	Jazz Semiconductor 8” SiGe BiCMOS line (acquired May 2008)	Tower history page ✓
Bands	O-band (1310 nm) and C-band (1550 nm)	Tower SiPh technology page ✓
Volume status	High-volume manufacturing	Tower 300mm SiPh release, semiconductor-today 2024-11-26 ✓
Variant	PH18M — Tower-disclosed sub-platform with low-loss waveguides, PDs, modulators	Tower SiPh technology page ✓
300mm complement	New Tower 300mm SiPh process announced Nov 2024 (Migdal Haemek hosted) — built on PH18 design heritage	semiconductor-today 2024-11-26 ✓

The 180 nm CMOS-base lithography is deliberately conservative for a SiPh process — the photonic device features (waveguide widths, ring radii, modulator phase-shift section lengths) are typically 100s of nm to 10s of µm, well above the lithographic minimum, and the 180 nm node delivers high yield with mature defectivity. ◐ This is consistent with the broader open-foundry SiPh node strategy (vs GF Fotonix at 45 nm and AMF at 130 nm) — the 180 nm base privileges thermal-budget headroom for photonic-quality waveguide anneals over CMOS-density scaling.

2. Photonic device library

The PH18 PDK ships a productized photonic-element library validated for tape-out. Per the public Tower SiPh technology page (towersemi.com) ✓:

Device class	Implementation	Use case
Waveguides	Low-loss silicon (Si) and silicon-nitride (SiN) routing waveguides	Single-mode 1310/1550 nm routing; SiN segments for thermal-insensitive interconnect, polarization handling, and mode conversion
Modulators	Mach-Zehnder modulator (MZM) with PIN-junction phase-shifter	High-speed PAM4 transceivers — the OFC 2026 Coherent demo used a Tower silicon MZM at 420 Gb/s PAM4 ✓
Photodetectors	Germanium PIN photodiodes; germanium avalanche photodiodes (APDs)	C-band and O-band PD; APD path enables long-reach links with higher receiver sensitivity
Phase shifters	PIN-junction (carrier-injection); thermo-optic (heater-driven)	Active modulation; tuning, biasing
Heater elements	On-chip resistive heaters	Thermal tuning of MZIs, ring-resonators, polarization elements
Fiber-coupling	Fiber alignment + facet (edge) coupling	Wafer- and die-level fiber attach
Hybrid integration	3D-IC hybrid wafer-bonding capability	Heterogeneous integration of III-V (e.g., Scintil InP laser-on-Si) onto silicon photonics (optics.org Scintil-on-Tower, 2024) ✓
Wafer-level test	In-line wafer-level optical test	Yield-screening before singulation

⚠ The Tower SiPh public page does not explicitly enumerate grating couplers or polarization splitter-rotator (PSR) elements; the omission may reflect public-page concision rather than absence from the PDK. Confirmation requires PDK access under NDA.

The recent MZM bandwidth disclosure is the most consequential 2026 device-library data point. The Tower / Coherent OFC 2026 paper documents a 420 Gb/s PAM4 (~210 Gbaud) open eye on a silicon MZM “without exotic materials” — i.e., using only the silicon PIN-junction phase shifter, no thin-film lithium niobate or polymer overlay. This sets a productized silicon-MZM baseline against which LWLG’s polymer-enhanced PH18 modulator (development-agreement release, March 11, 2026) is benchmarked.

The LWLG integration adds a slot-waveguide / EO-polymer-fill geometry to the existing silicon MZM template, with the Perkinamine polymer providing the high-r33 EO activity that the silicon plasma-dispersion phase shifter cannot match for V·cm and bandwidth-distance product. ◐ The slot-waveguide modification is foundry process work that Tower is doing under the development agreement; the PDK addition is the LWLG modulator reference design.

3. Electronic integration — TS18SL and SBC18S5

PH18’s structural complement is Tower’s adjacent SiGe BiCMOS process portfolio on the same Newport Beach 200mm line:

Process	Node	Role	Notes
TS18SL	180 nm SiGe BiCMOS	Driver / TIA platform	Low-cost, high-integration BiCMOS for transceiver electronics; pairs with PH18 in 2-die hybrid transceiver builds. ⚠ The “TS18” naming convention is widely cited in optical-transceiver literature and Tower customer disclosures; primary-source Tower nomenclature should be cross-checked against the PDK manual.
SBC18S5	180 nm high-speed SiGe BiCMOS	High-frequency optical I/O	250 GHz f_T-class; the higher-bandwidth SiGe path. Used in mmWave / high-baud transceiver electronics. ⚠ Same nomenclature caveat.

Unlike GlobalFoundries Fotonix (which is monolithic — photonics + RF-CMOS on a single die), PH18 is fundamentally a photonic-die-only process. SiGe BiCMOS drivers / TIAs are taped out on TS18SL or SBC18S5 as separate dies and assembled with the PH18 photonic die at the package level (wirebond, flip-chip, or 3D-IC hybrid wafer-bond). This is the load-bearing structural difference that defines PH18’s competitive positioning vs Fotonix:

Pro PH18 (vs Fotonix): lower wafer-cost overhead (200mm vs 300mm); cleaner separation between photonic process and CMOS process means each can be optimized independently; the 200mm Newport Beach line has 15+ years of SiGe BiCMOS yield maturity.
Pro Fotonix (vs PH18): monolithic integration eliminates die-to-die assembly parasitics; 300mm wafer area scales fixed-cost mask spend across more die; 45 nm RF-CMOS hits ~300 GHz f_T classes that 180 nm SiGe BiCMOS cannot.

The cross-foundry economics for any given customer reduce to whether the application’s BoM is dominated by photonic-die area (favors PH18) or by die-to-die parasitic loss (favors Fotonix monolithic). For 800G-1.6T transceiver and CPO classes, the parasitic-loss term increasingly dominates — which is why the 400 G/lane silicon-MZM result matters: it lets PH18 hit 1.6T-3.2T bandwidth-per-fiber without forcing customers onto the 300mm monolithic alternative.

4. PDK and EDA support

Tower’s open-foundry SiPh PDK is supported by a broad EDA ecosystem — the public Tower SiPh page enumerates (towersemi.com) ✓:

Ansys — Lumerical photonic device simulation, certified for Tower SiPh
Cadence — Virtuoso integration; schematic-driven photonic layout
GDSFactory — open-source PDK flow (the same flow LWLG and GF used for the GDSFactory PDK release on Fotonix in March 2026)
LDS — layout-design support (presumably Layout-Driven Schematic / LDS-Photonics)
Luceda — IPKISS-based PDK flow
Siemens (Mentor Graphics) — Calibre / Tanner PDK integration
Synopsys — co-design + Photonic Solutions

The breadth of EDA support is structurally important: the more EDA flows are productized, the lower the on-ramp friction for new customers tape-outing on PH18. PH18 is now PDK-flow-equivalent to GF Fotonix — both have Cadence, Synopsys, Ansys, Luceda, and GDSFactory paths productized.

⚠ Specific PDK rev numbers and design-rule manual versions are not publicly disclosed; PDK access is gated by Tower’s customer-onboarding process under NDA.

The MPW shuttle program is publicly confirmed — Tower runs PH18 multi-project-wafer (MPW) shuttle runs through the year, providing access to the platform at sub-mask-set cost for prototyping customers (Tower SiPh page) ✓.

5. Customer disclosure history

PH18 customer history runs from Alpine Optoelectronics (December 2020) through Lightwave Logic (March 2026). The chronological disclosure cadence:

Date	Customer / disclosure	Source
2020-12	Alpine Optoelectronics — 400G PAM4 optical engine on PH18, including MZMs and Ge PDs	semiconductor-today, 2020-12-29 ✓
2021-01	Tower + Scintil — integrated-laser-on-silicon-photonics co-development, building III-V (InP) hybrid integration onto PH18	semiconductor-today, 2021-05-01 ✓
2021-09	Tower LiDAR breakthrough announcement — PH18-derived process for ADAS LiDAR	Tower IR release, 2021-09-13 ✓
2024-11	Tower 300mm SiPh announced as standard offering — productized 300mm complement to PH18 (200mm)	semiconductor-today, 2024-11-26 ✓
2026-03-11	Lightwave Logic + Tower development agreement — Perkinamine polymer integration into PH18 PDK; 110 GHz-and-beyond bandwidth target; multiple engineering tape-outs in 2026; sample by end-2026; volume 2027	Stocktitan / LWLG, 2026-03-11 ✓
2026-03-23	Tower + Coherent OFC 2026 demo — silicon MZM in Tower’s production-ready SiPh process at 420 Gb/s PAM4 paired with Coherent InP CW laser; targeting 3.2T transceivers / CPO	Tower / Coherent joint release on GlobeNewswire, 2026-03-23 ✓

⚠ The OFC 2026 paper itself (presentation number, authors, full proceedings citation) is not yet web-indexed beyond the joint release; the full OFC 2026 proceedings citation should be added once Optica publishes the abstract DOI.

⚠ Other customers known to be on PH18 — including STAR-net / commercial transceiver vendors not in the LWLG / Coherent / Alpine bucket — have not been individually disclosed. The total customer count for PH18 is not publicly disclosed; Tower’s general posture is that customer relationships are confidential unless the customer authorizes joint disclosure.

6. Comparison to GlobalFoundries Fotonix (45SPCLO + 9WG)

Axis	Tower PH18 (200mm)	GF Fotonix 45SPCLO (300mm)	Notes
Wafer size	200 mm	300 mm	Fotonix has 2.25× area per wafer
CMOS node base	180 nm	45 nm SOI	GF’s RF-CMOS hits ~300 GHz f_T; Tower’s separate SBC18S5 SiGe BiCMOS reaches ~250 GHz f_T
Integration model	Photonic-die only; SiGe BiCMOS on companion die (TS18SL / SBC18S5)	Monolithic CMOS + photonics on a single die	Structural differentiator
Modulator topologies	MZM (PIN-junction)	MZM, micro-ring (MRM), ring-assisted MZM (RAMZM)	Fotonix has more topology breadth in PDK
Photodetectors	Ge PIN, Ge APD	Ge PIN	Tower offers APD path
Polymer / SOH overlay	LWLG Perkinamine in development under March 11, 2026 agreement	LWLG Perkinamine via GDSFactory PDK live (March 16, 2026); NLM Selerion via AMF GP PIC sampling	Both foundries on parallel polymer-integration paths
EDA flows	Ansys, Cadence, GDSFactory, LDS, Luceda, Siemens, Synopsys	Cadence, Synopsys, Ansys, Luceda, GDSFactory, Enosemi	Substantially equivalent
HVM status	HVM since at least 2020 (Alpine)	HVM since 2022 (Fotonix launch)	Both productized
Wafer-cost economics	Lower fixed cost per wafer (200mm); lower die per wafer (smaller wafer area)	Higher fixed cost per wafer (300mm); higher die per wafer (larger wafer area, 2.25×)	Crossover depends on die size; for sub-50 mm² photonic dies, 200mm can be more cost-effective per die
Density	Lower (180 nm + photonic-die-only architecture)	Higher (45 nm + monolithic)	Material for parasitic-sensitive applications
Yield maturity	Mature on the Newport Beach Jazz line (15+ years SiGe BiCMOS heritage)	Mature on Fab 8 Malta (productized 2022)	Both production-grade

The structural read: PH18 and Fotonix are complementary rather than directly substitutable. Tower’s 200mm asset is the wafer-cost-leaner option for photonic-die-dominated bills of materials and for customers who prefer separate driver dies on a yield-mature SiGe BiCMOS line. Fotonix is the higher-density / monolithic option for parasitic-sensitive 1.6T-3.2T builds where the driver-photonic loop must be lithographically co-integrated. The fact that both LWLG and NLM are on both foundries — LWLG with PH18 (March 11, 2026) and Fotonix (March 16, 2026 GDSFactory PDK), NLM with AMF (now-GF) PIC sampling and a Tower path implied by parallel foundry strategy — confirms the complementarity reading.

The 300mm Tower SiPh process announced November 26, 2024 (semiconductor-today) ✓ partially closes the wafer-area gap to Fotonix while preserving Tower’s open-foundry posture and PH18 design heritage. ⚠ The 300mm node specs (CMOS base, photonic-element parity with PH18, fab location at Migdal Haemek) are confirmed but the productization timeline and customer roster are not yet web-indexed.

7. Open audit items

⚠ OFC 2026 paper full citation — Tower / Coherent 420 Gb/s PAM4 MZM demo. The press release confirms OFC 2026 presentation but the Optica DOI / paper number is not in the joint release.
⚠ PH18M variant — Tower SiPh page lists “PH18M” alongside PH18 with low-loss waveguides + PDs + modulators. Whether PH18M is a sub-PDK with reduced device library or a packaging-oriented variant is not clarified publicly.
⚠ TS18SL / SBC18S5 nomenclature — these process names appear in transceiver literature and customer disclosures but Tower’s public technology page does not index by these designators; cross-confirmation against the Tower PDK manual is needed.
⚠ PDK rev history — PH18 PDK version numbers and rev cadence not publicly disclosed.
⚠ Slot-waveguide process modifications for LWLG — the structural change Tower is making for the Perkinamine integration is presumably parallel to GF’s 2026-03-16 disclosure, but Tower has not yet published an analogous process-modification description.
⚠ Grating coupler and PSR PDK elements — not enumerated on the public technology page; presumably present given the breadth of Tower’s customer base.
⚠ PH18 wafer-output capacity at Newport Beach — not separately disclosed; Tower segment reporting aggregates Newport Beach RF + photonics + image-sensor flows.
⚠ PH18 yield / defect-density — never publicly disclosed; the most reliable proxy is the Coherent OFC 2026 result and 15+ years of HVM customer commitment.

Cross-references

Technology overview — PH18 in the broader Tower process portfolio
Tower-ST Agrate 300mm — RF/analog 300mm capacity-extension JV
Newport Beach + San Antonio / Maxim history — fab footprint and asset acquisitions
Patents overview — PH18-relevant IP cluster
overview — customer ecosystem
ip patents — LWLG IP stack that gets dropped into PH18 slot waveguides
fotonix process overview — comparison foundry process